University of Illinois Urbana-Champaign

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Showing 1–30 of 313 items
A Feature Taxonomy and Survey of Synchronization Primitive Implementations
Glew, Andy; Hwu, Wen-Mei

Gelato Federation : Global Partnerships Advancing Itanium
Smith, Mark K.; Hwu, Wen-Mei

Performance Implications of Synchronization Support for Parallel FORTRAN Programs
Anik, Sadun; Hwu, Wen-Mei W.

Single-Pass Memory System Evaluation for Multiprogramming Workloads
Conte, Thomas M.; Hwu, Wen-Mei W.

Accelerating Graph Partitioning on Modern GPUs
Sun, Chenguang

Accelerating an efficient implementation of MLFMA with hererogeneous computing
Ren, Wei

Xprof: An Execution Profiler for Window-Oriented Applications
Gupta, Aloke; Hwu, Wen-Mei W.

Analyzing bottlenecks in large recommendation systems
Zhang, Jialiang

Efficient Instruction Sequencing with Inline Target Insertion
Hwu, Wen-Mei W.; Chang, Pohua P.

Compiler-Assisted Signature Monitoring
Warter, Nancy J.; Hwu, Wen-Mei W.

Towards automatic characterization of computation and communication in CUDA programs
Grande, Dominic

World embedding models evaluation and word inference accelerator
Liu, Zizhen

Profile-Guided Automatic Inline Expansion for C Programs
Chang, Pohua P.; Hwu, Wen-Mei W.

The Susceptibility of Programs to Context Switching
Hwu, Wen-Mei W.; Conte, Thomas M.

Combining Sampling with Single-Pass Techniques for Efficient Cache Simulation
Conte, Thomas M.; Hwu, Wen-Mei W.

Denial of service exploits on CUDA devices using clock function
Dheenadhayalan, Janarth

GoPar: Automated Loop Parallelization of Go Programs
Wetherbee, Ian

Accelerating large sparse deep neural networks inference
Liu, Hanhaotian

Using Profile Information to Assist Classic Code Optimizations
Chang, Pohua P.; Mahlke, Scott A.; Hwu, Wen-Mei W.

Fcuda Memory Subsystems
Xu, Shuotao

The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors
Chang, Pohua P.; Lavery, Daniel M.; Hwu, Wen-Mei W.

The Effect of Code Expanding Optimizations on Instruction Cache Design
Chen, William Y.; Chang, Pohua P.; Conte, Thomas M.; Hwu, Wen-Mei W.

Design and implementation of MLHarness
Chang, Yen-Hsiang

Dynamic Tracking of Information Flow Signatures for Security Checking
Healey, William; Pattabiraman, Karthik; Ryoo, Shane; Iyer, Ravi; Hwu, Wen-Mei

Compiler-Assisted Multiple Instruction Retry
Li, Chung-Chi Jim; Chen, Shyh-Kwei; Fuchs, W. Kent; Hwu, Wen-Mei W.

IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors
Chang, Pohua P.; Mahlke, Scott A.; Chen, William Y.; Warter, Nancy J.; Hwu, Wen-Mei W.

Three Superblock Scheduling Models for Superscalar and Superpipelined Processors
Chang, Pohua P.; Warter, Nancy J.; Mahlke, Scott A.; Chen, William Y.; Hwu, Wen-Mei W.

Ensuring Critical Data Integrity via Information Flow Signatures
Healey, William; Pattabiraman, Karthik; Ryoo, Shane; Dabrowski, Paul; Kalbarczyk, Zbigniew; Iyer, Ravi; Hwu, Wen-Mei

Reducing Cache Misses in Numerical Applications Using Data Relocation and Prefetching
Yamada, Yoji; Johnson, Teresa L.; Haab, Grant E.; Gyllenhaal, John C.; Hwu, Wen-Mei W.; Torrellas, Josep

Operating System Interfaces: Bridging the Gap Between CPU and FPGA Accelerators
Kelm, John; Gelado, Isaac; Hwang, Kuangwei; Burke, Dan; Ueng, Sain-Zee; Navarro, Nacho; Lumetta, Steve; Hwu, Wen-Mei