University of Illinois Urbana-Champaign

Academic Unit
Collection
Author(s)
Keyword(s)
Type of Resource
Showing 91–120 of 9,210 items
Thumbnail for Genetic and agronomic approaches for improving nitrogen use and maize productivity
Genetic and agronomic approaches for improving nitrogen use and maize productivity
Haegele, Jason

Thumbnail for Use of Architectural-level Primitives in System-level Diagnosis and Speed Up of Test Vector Generation
Use of Architectural-level Primitives in System-level Diagnosis and Speed Up of Test Vector Generation
Kunda, Ramachandra P.

Thumbnail for Performability Modeling Based on Real Data: A Case Study
Performability Modeling Based on Real Data: A Case Study
Hsueh, M.C.; Iyer, R.K.; Trivedi, K.S.

Thumbnail for On the Convergence of Newton's Method for Solving Systems of Linear Equations
On the Convergence of Newton's Method for Solving Systems of Linear Equations
Hornick, Scot W.; Preparata, Franco P.; Tiwari, Prasoon

Thumbnail for Application of pressure-projection algorithms to a sharp projection immersed boundary method for the incompressible Navier-Stokes equations
Application of pressure-projection algorithms to a sharp projection immersed boundary method for the incompressible Navier-Stokes equations
Bay, Yong Yi

Thumbnail for The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors
The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors
Chang, Pohua P.; Lavery, Daniel M.; Hwu, Wen-Mei W.

Thumbnail for Replication-aware file-system crash consistency
Replication-aware file-system crash consistency
Bhandari, Chaitanya Bhushan • 2024

Thumbnail for Recognition of Error Symptoms in Large Systems
Recognition of Error Symptoms in Large Systems
Sridhar, Venkateswaren [Venkateswaran]; Iyer, Ravi K.; Sanders, Doug

Thumbnail for The VLSI Optimality of the AKS Sorting Network
The VLSI Optimality of the AKS Sorting Network
Bilardi, Gianfranco; Preparata, Franco P.

Thumbnail for Parallel Circuit Extraction on a Hypercube Multiprocessor
Parallel Circuit Extraction on a Hypercube Multiprocessor
Hagin, Anthony Dale

Thumbnail for Analysis of Clock Skew in Distributed Resistive-Capacitive Interconnects
Analysis of Clock Skew in Distributed Resistive-Capacitive Interconnects
Gura, Carol Valentina

Thumbnail for Trusted CI Webinar: Transitioning Cybersecurity Research to Practice - Success stories and tools you can use
Trusted CI Webinar: Transitioning Cybersecurity Research to Practice - Success stories and tools you can use
Hudson, Florence; Kiser, Ryan; Traynor, Patrick; Yang, S. Jay

Thumbnail for A Multiprocessor Fault Simulation Architecture
A Multiprocessor Fault Simulation Architecture
Baxter, Jeffrey John

Thumbnail for Analysis of On-Chip Clock Distribution Systems in High Speed Systems
Analysis of On-Chip Clock Distribution Systems in High Speed Systems
Gura, Carol V.; Abraham, Jacob A.

Thumbnail for Development of an Automatic Test Pattern Generation Package
Development of an Automatic Test Pattern Generation Package
Patel, Sanjaykumar Thakorbhai

Thumbnail for Switch-Level Timing Simulation of MOS VLSI Circuits
Switch-Level Timing Simulation of MOS VLSI Circuits
Rao, Vasant Bangalore

Thumbnail for On-Line Bin Packing in Linear Time
On-Line Bin Packing in Linear Time
Ramanan, Prakash; Brown, Donna J.

Thumbnail for Genomic improvement of nitrogen utilization efficiency in maize
Genomic improvement of nitrogen utilization efficiency in maize
Bubert, Jessica Marie

Thumbnail for A Minimum Area VLSI Architecture for O(logn) Time Sorting
A Minimum Area VLSI Architecture for O(logn) Time Sorting
Bilardi, G.; Preparata, F.P.

Thumbnail for Towards automatic characterization of computation and communication in CUDA programs
Towards automatic characterization of computation and communication in CUDA programs
Grande, Dominic

Thumbnail for Area-Time Lower-Bound Techniques with Application to Sorting
Area-Time Lower-Bound Techniques with Application to Sorting
Bilardi, G.; Preparata, F.P.

Thumbnail for Adaptation of the MapReduce programming framework to compute-intensive data-analytics kernels
Adaptation of the MapReduce programming framework to compute-intensive data-analytics kernels
Farivar, Reza

Thumbnail for Placement by Simulated Evolution
Placement by Simulated Evolution
Kling, Ralph Michael

Thumbnail for Transparent cultures: Imagined users and the politics of software design (1975-2012)
Transparent cultures: Imagined users and the politics of software design (1975-2012)
Black, Michael

Thumbnail for Optimal Synthesis of Algorithm-Specific Lower-Dimensional Processor Arrays
Optimal Synthesis of Algorithm-Specific Lower-Dimensional Processor Arrays
Ganapathy, Kumar N.; Wah, Benjamin W.

Thumbnail for Explorations of engineered bosonic systems in ultracold atoms, oscillator networks, quantum spin chains, and space
Explorations of engineered bosonic systems in ultracold atoms, oscillator networks, quantum spin chains, and space
Rhyno, Brendan Douglas • 2025

Thumbnail for Cognitive-motor interaction during wheelchair propulsion
Cognitive-motor interaction during wheelchair propulsion
Frechette, Mikaela Lynn • 2022

Thumbnail for Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits
Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits
Yuan, Chen-Ping

Thumbnail for Zoom Out and See Better: Scalable Message Tracing for Post-Silicon SoC Debug
Zoom Out and See Better: Scalable Message Tracing for Post-Silicon SoC Debug
Pal, Debjit; Vasudevan, Shobha

Thumbnail for Decomposing Genomics Algorithms: Core Computations for Accelerating Genomics
Decomposing Genomics Algorithms: Core Computations for Accelerating Genomics
Athreya, Arjun P.; Banerjee, Subho S.; Jongeneel, C. Victor; Kalbarczyk, Zbigniew T.; Iyer, Ravishankar K.