University of Illinois Urbana-Champaign

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Showing 1–30 of 156 items
Thumbnail for An Algebraic Approach to Switch-Level Simulation
An Algebraic Approach to Switch-Level Simulation
Hajj, Ibrahim N.

Thumbnail for The Complexity of Test Generation at the Transistor Level
The Complexity of Test Generation at the Transistor Level
Najm, Farid; Hajj, Ibrahim

Thumbnail for A Multilevel Parallel Solver for Block Tridiagonal and Banded Linear Systems
A Multilevel Parallel Solver for Block Tridiagonal and Banded Linear Systems
Hajj, Ibrahim N.; Skelboe, Stig

Thumbnail for On the Convergence of Block Time-Point Relaxation Methods for Circuit Simulation
On the Convergence of Block Time-Point Relaxation Methods for Circuit Simulation
Desai, Madhav P.; Hajj, Ibrahim N.

Thumbnail for A Pattern Independent Approach to Maximum Current Estimation in CMOS Circuits
A Pattern Independent Approach to Maximum Current Estimation in CMOS Circuits
Kriplani, Harish; Najm, Farid; Hajj, Ibrahim

Thumbnail for Architectural Support for Power Reduction in High Performance Microprocessors
Architectural Support for Power Reduction in High Performance Microprocessors
Bellas, Nikos; Hajj, Ibrahim; Polychronopoulos, Constantine

Thumbnail for Timing and Area Optimization for Standard-Cell VLSI Circuit Design
Timing and Area Optimization for Standard-Cell VLSI Circuit Design
Chuang, Weitong; Sapatnekar, Sachin S.; Hajj, Ibrahim N.

Thumbnail for Parallel-Concurrent Versus Concurrent Fault Simulation
Parallel-Concurrent Versus Concurrent Fault Simulation
Saab, Daniel Georges; Rahmeh, Joseph T.; Hajj, Ibrahim N.

Thumbnail for Logic Design Error Diagnosis and Correction
Logic Design Error Diagnosis and Correction
Chung, Pi-Yu; Wang, Yi-Min; Hajj, Ibrahim N.

Thumbnail for Two-Level Hierarchical Coupling Aware Static Timing Simulation
Two-Level Hierarchical Coupling Aware Static Timing Simulation
Li, Ninglong; Hajj, Ibrahim N.

Thumbnail for Improving the Accuracy of Krylov Subspace-based Order Reduction Algorithms
Improving the Accuracy of Krylov Subspace-based Order Reduction Algorithms
Becer, Murat; Lu, Ninglong; Hajj, Ibrahim N.

Thumbnail for iSITE: Automatic circuit synthesis for double-metal CMOS VLSI circuits
iSITE: Automatic circuit synthesis for double-metal CMOS VLSI circuits
Gee, Perry

Thumbnail for Efficient Testing for Bridging Faults in Digital Integrated Circuits
Efficient Testing for Bridging Faults in Digital Integrated Circuits
Chen, Tzu-Hao

Thumbnail for Power Distribution Network Analysis and Optimization in Digital VLSI Circuits
Power Distribution Network Analysis and Optimization in Digital VLSI Circuits
Bai, Geng

Thumbnail for Probabilistic simulation for reliability and average power estimation
Probabilistic simulation for reliability and average power estimation
Stamoulis, Georgios Ioannis

Thumbnail for Architectural and Compiler Techniques for Energy Reduction in High-Performance Microprocessors
Architectural and Compiler Techniques for Energy Reduction in High-Performance Microprocessors
Bellas, Nikolaos

Thumbnail for Piecewise Linear Approach for Timing Simulation of VLSI Circuits on Serial and Parallel Computers
Piecewise Linear Approach for Timing Simulation of VLSI Circuits on Serial and Parallel Computers
Tejayadi, Ongky

Thumbnail for Probabilistic simulation for reliability analysis of VLSI circuits
Probabilistic simulation for reliability analysis of VLSI circuits
Najm, Farid Nasri

Thumbnail for Crosstalk Noise in Deep Submicron Integrated Circuit Design
Crosstalk Noise in Deep Submicron Integrated Circuit Design
Becer, Murat R.

Thumbnail for Diagnosis and correction of logic design errors
Diagnosis and correction of logic design errors
Chung, Pi-Yu

Thumbnail for Fast timing simulation of MOS VLSI circuits
Fast timing simulation of MOS VLSI circuits
Overhauser, David Vincent

Thumbnail for Worst case voltage drops in power and ground buses of CMOS VLSI circuits
Worst case voltage drops in power and ground buses of CMOS VLSI circuits
Kriplani, Harish

Thumbnail for Input-Pattern-Independent Estimation of Peak Current, Peak Power Dissipation, and Maximum Voltage Variation in the Power Distribution Network of VLSI Circuits
Input-Pattern-Independent Estimation of Peak Current, Peak Power Dissipation, and Maximum Voltage Variation in the Power Distribution Network of VLSI Circuits
Bobba, Sudhakar

Thumbnail for A simulation and redesign system for circuit hot-carrier reliability
A simulation and redesign system for circuit hot-carrier reliability
Li, Ping-Chung

Thumbnail for Crosstalk Noise and Timing Analysis of Digital VLSI Circuits With Coupled Interconnects
Crosstalk Noise and Timing Analysis of Digital VLSI Circuits With Coupled Interconnects
Lu, Ninglong

Thumbnail for
"Contesting Islam: ""Homegrown Wahhabism,"" Education and Muslim Identity in Northern Ghana, 1920--2005"
Iddrisu, Abdulai

Thumbnail for Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
Veneris, Andreas Georgios

Thumbnail for Power Estimation and Minimization of Digital Signal Processing Systems
Power Estimation and Minimization of Digital Signal Processing Systems
Ramprasad, Sumant

Thumbnail for On Hajj Tourism: In Search of Piety and Identity in the New Order Indonesia
On Hajj Tourism: In Search of Piety and Identity in the New Order Indonesia
Abdurrahman, Moeslim

Thumbnail for Mixed-Mode Timing Simulation for Accurate CMOS Bridging Fault Detection
Mixed-Mode Timing Simulation for Accurate CMOS Bridging Fault Detection
Tian, Yanmei